Ronny Abdullah — Electrical Engineer

Stanford EE working on RTL design, hardware verification, and embedded systems.

Experience

Stanford Robust Systems Group

Sept 2024 — Present

Researcher, RTL Design & Hardware Verification · Prof. Subhasish Mitra

  • Designed 7 SystemVerilog RTL modules for accelerator datapaths, covering MAC control, SRAM scheduling, and ready/valid interfaces.
  • Authored 45+ SVA properties and 120+ directed and constrained-random tests, uncovering 6 corner cases including deadlock and illegal handshakes.
  • Built nightly regressions across 2,000+ simulation seeds, raising functional coverage from 62% to 91%.

Teaching Assistant — ENGR 40M, EE 101A

Mar 2025 — June 2026

Stanford University

  • Led 3 weekly lab sections per quarter of 20–25 students on digital logic, circuit analysis, PCB bring-up, and firmware.
  • Ran 150+ debugging sessions per quarter on board bring-up failures and firmware bugs across interrupts, timers, and peripherals.
  • Cut recurring lab failure rates by 35% by rewriting starter code and validation tests.

XDR Radiology

June 2025 — Sept 2025

Software Engineering Intern, Backend Systems · Los Angeles, CA

  • Built 5+ backend services and 12+ REST endpoints for study ingestion and workflow state management.

Projects

SIMD Matrix-Multiply Accelerator

A SIMD accelerator with PE datapath, controller FSM, and on-chip memory buffer, optimized to FoM < 50 within 1 mm² and closed in Synopsys DC.

  • SystemVerilog
  • Catapult HLS
  • Synopsys DC

5-Stage Pipelined MIPS Processor

A 5-stage pipelined MIPS core supporting 40+ ops at single-cycle throughput, with RAW-hazard detection, data forwarding, and precise stall control.

  • SystemVerilog
  • Xilinx Zynq
  • FPGA

Wave-Table Music Synthesizer

An FSM-driven wave-table synthesizer generating sine-wave audio from ROM lookup tables, paired with a double-buffered VGA visualization datapath.

  • Verilog
  • FPGA
  • VGA

Bare-Metal Autonomous RC Car

Bare-metal C firmware configuring UART, PWM timers, and SPI/I²C for a Bluetooth-controlled car with live camera streaming.

  • C
  • STM32
  • ARM Cortex-M

FM Stereo Radio Receiver

Populated and brought up a multi-component FM receiver PCB with an RDA5807 front-end, LDO regulation, and RF passives.

  • Board Bring-Up
  • RF Signal Chain
  • PCB Rework

Motorized Couch

A drivable couch built with Stanford Moonshot Club, running embedded motor control and a custom throttle and steering linkage.

  • Embedded C
  • Motor Control
  • Mechanical

Skills

RTL & Verification
SystemVerilog, Verilog, SVA, constrained-random and directed testbenches, functional coverage, FSM design, pipelining, timing closure, clock gating
Tools & Flow
Synopsys Design Compiler, Xilinx Vivado, FPGA (Xilinx Zynq), Git, Linux, Docker, TCL
Programming
C, C++, Python, x86-64 Assembly, ARM Assembly, JavaScript
Embedded & Hardware
STM32 (ARM Cortex-M), GPIO, timers, interrupts, DMA, ADC/DAC, UART, SPI, I²C, PCB design

Education

Stanford University

June 2027

M.S. in Electrical Engineering

Stanford University

June 2026

B.S. in Electrical Engineering

Contact

Open to internships and full-time roles in digital design, verification, and embedded systems. LinkedIn is the fastest way to reach me.